From e8f0f5cb24be59a8416b9bfb7bd6934ad0d0e946 Mon Sep 17 00:00:00 2001 From: Tim Deegan Date: Fri, 3 Aug 2007 12:10:35 +0100 Subject: [PATCH] [HVM] Yet another MCA/MCE MSR. Signed-off-by: Tim Deegan --- xen/arch/x86/hvm/svm/svm.c | 1 + xen/arch/x86/hvm/vmx/vmx.c | 1 + xen/include/asm-x86/msr.h | 5 +++++ 3 files changed, 7 insertions(+) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 2cb210e173..4578aaa616 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2159,6 +2159,7 @@ static void svm_do_msr_access( case MSR_K8_MC2_STATUS: case MSR_K8_MC3_STATUS: case MSR_K8_MC4_STATUS: + case MSR_K8_MC5_STATUS: /* No point in letting the guest see real MCEs */ msr_content = 0; break; diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 61aa6d5b6f..37d8857acc 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2596,6 +2596,7 @@ static int vmx_do_msr_read(struct cpu_user_regs *regs) case MSR_K8_MC2_STATUS: case MSR_K8_MC3_STATUS: case MSR_K8_MC4_STATUS: + case MSR_K8_MC5_STATUS: /* No point in letting the guest see real MCEs */ msr_content = 0; break; diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index 862e02c5d3..1f89ee0a37 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -240,6 +240,11 @@ static inline void write_efer(__u64 val) #define MSR_K8_MC4_ADDR 0x412 #define MSR_K8_MC4_MISC 0x413 +#define MSR_K8_MC5_CTL 0x414 +#define MSR_K8_MC5_STATUS 0x415 +#define MSR_K8_MC5_ADDR 0x416 +#define MSR_K8_MC5_MISC 0x417 + /* Pentium IV performance counter MSRs */ #define MSR_P4_BPU_PERFCTR0 0x300 #define MSR_P4_BPU_PERFCTR1 0x301 -- 2.30.2